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Seminars
June 30, 2026
WORKSHOP: Revolutionize your chip design with GDSFactory+

Hour: From 15:00h to 16:00h

Place: Seminar Room

WORKSHOP: Revolutionize your chip design with GDSFactory+

JOAQUIN MATRES
Founder and CTO, GDS Factory+

ABSTRACT

GDSFactory+ is a powerful platform for chip design—supporting Photonics, Quantum, and MEMS. It enables you to layout and simulate designs, while also providing built-in Design Rule Checking (DRC) and Layout Versus Schematic (LVS) verification.

Beyond design, GDSFactory+ extends into fabrication and testing: it integrates mask bias correction to ensure devices meet exact specifications, and provides advanced data analysis tools, including Known Good Die (KGD) evaluation. This makes it a complete solution for streamlining the design-to-fabrication workflow.

AGENDA

 

  • Python driven layout: Hello World Pcell
  • Schematic driven layout: Double ring filter schematic, layout and simulation
  • Run DRC verification

BIO

Joaquin is a veteran chip designer with +15 years of experience at leading companies including Intel, Hewlett Packard, PsiQuantum and Google X.
In 2019, he founded GDSFactory, a successful open-source project that has since become a cornerstone of Pythonbased chip design, over 3 million downloads.

Today, with GDSFactory+, the platform supports over 25 foundries and hundreds of organizations, helping them streamline and accelerate their chip design workflows.

Seminars
June 30, 2026
WORKSHOP: Revolutionize your chip design with GDSFactory+

Hour: From 15:00h to 16:00h

Place: Seminar Room

WORKSHOP: Revolutionize your chip design with GDSFactory+

JOAQUIN MATRES
Founder and CTO, GDS Factory+

ABSTRACT

GDSFactory+ is a powerful platform for chip design—supporting Photonics, Quantum, and MEMS. It enables you to layout and simulate designs, while also providing built-in Design Rule Checking (DRC) and Layout Versus Schematic (LVS) verification.

Beyond design, GDSFactory+ extends into fabrication and testing: it integrates mask bias correction to ensure devices meet exact specifications, and provides advanced data analysis tools, including Known Good Die (KGD) evaluation. This makes it a complete solution for streamlining the design-to-fabrication workflow.

AGENDA

 

  • Python driven layout: Hello World Pcell
  • Schematic driven layout: Double ring filter schematic, layout and simulation
  • Run DRC verification

BIO

Joaquin is a veteran chip designer with +15 years of experience at leading companies including Intel, Hewlett Packard, PsiQuantum and Google X.
In 2019, he founded GDSFactory, a successful open-source project that has since become a cornerstone of Pythonbased chip design, over 3 million downloads.

Today, with GDSFactory+, the platform supports over 25 foundries and hundreds of organizations, helping them streamline and accelerate their chip design workflows.